Introduction

Welcome to my first blog post. As an Analog Layout Staff Engineer, I deal with parasitic resistance and capacitance daily.

Mathematical Equations

Because we configured KaTeX, we can write complex math easily. For example, the drain current in saturation:

$$I_D = \frac{1}{2} \mu_n C_{ox} \frac{W}{L} (V_{GS} - V_{TH})^2 (1 + \lambda V_{DS})$$

Code Snippets

We can also share Tcl scripts used in Synopsys tools:

# Example Tcl for Custom Compiler
set cell_name "my_serdes_block"
set lib_name "tsmc_2nm_lib"
open_cell_view -lib $lib_name -cell $cell_name -view layout
puts "Opened layout for $cell_name"